Development of a Measuring Device for the Parasitic Inductance of the DC-link Backplane of an Inverter
Four different design options are investigated for a DC-link backplane of an inverter. The backplanes interconnect switches and capacitors and have slots at various positions. The purpose is to evaluate the performance of the four topologies regarding parasitic inductance. A probe is developed to me...
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creator | Bolsens, B. Van den Keybus, J. Driesen, J. Belmans, R. |
description | Four different design options are investigated for a DC-link backplane of an inverter. The backplanes interconnect switches and capacitors and have slots at various positions. The purpose is to evaluate the performance of the four topologies regarding parasitic inductance. A probe is developed to measure these low inductances. The probe is powered from a high-frequency source and is connected to a digital oscilloscope through four differential measurements. The measurements are compared with numerical simulations calculating the inductance with the method of moments. The simulations and the measurements yield similar results |
doi_str_mv | 10.1109/IMTC.2006.328218 |
format | Conference Proceeding |
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The simulations and the measurements yield similar results</description><identifier>ISSN: 1091-5281</identifier><identifier>ISBN: 9780780393592</identifier><identifier>ISBN: 0780393597</identifier><identifier>EISBN: 0780393600</identifier><identifier>EISBN: 9780780393608</identifier><identifier>DOI: 10.1109/IMTC.2006.328218</identifier><language>eng</language><publisher>IEEE</publisher><subject>backplane ; Backplanes ; Capacitors ; DC-link ; high switching frequencies ; Inductance measurement ; inverter ; Inverters ; low inductance ; Moment methods ; Numerical simulation ; Oscilloscopes ; parasitic inductance ; parasitics ; Probes ; probing ; Switches ; Topology</subject><ispartof>2006 IEEE Instrumentation and Measurement Technology Conference Proceedings, 2006, p.1721-1724</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/4124643$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/4124643$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Bolsens, B.</creatorcontrib><creatorcontrib>Van den Keybus, J.</creatorcontrib><creatorcontrib>Driesen, J.</creatorcontrib><creatorcontrib>Belmans, R.</creatorcontrib><title>Development of a Measuring Device for the Parasitic Inductance of the DC-link Backplane of an Inverter</title><title>2006 IEEE Instrumentation and Measurement Technology Conference Proceedings</title><addtitle>IMTC</addtitle><description>Four different design options are investigated for a DC-link backplane of an inverter. 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The simulations and the measurements yield similar results</description><subject>backplane</subject><subject>Backplanes</subject><subject>Capacitors</subject><subject>DC-link</subject><subject>high switching frequencies</subject><subject>Inductance measurement</subject><subject>inverter</subject><subject>Inverters</subject><subject>low inductance</subject><subject>Moment methods</subject><subject>Numerical simulation</subject><subject>Oscilloscopes</subject><subject>parasitic inductance</subject><subject>parasitics</subject><subject>Probes</subject><subject>probing</subject><subject>Switches</subject><subject>Topology</subject><issn>1091-5281</issn><isbn>9780780393592</isbn><isbn>0780393597</isbn><isbn>0780393600</isbn><isbn>9780780393608</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2006</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotjE1PAjEQQGvUREDuJl76BxanH9t2j7r4QQLRA55J2U61shTSXUj891bxNPPy5g0hNwwmjEF1N1ss6wkHUBPBDWfmjAxBGxCVUADnZFxlOHFZ8QsyyA0rSm7YFRl23RfkUmo9IH6KR2x3-y3Gnu48tXSBtjukED9oVqFB6neJ9p9I32yyXehDQ2fRHZrexixz8uumddGGuKEPttnsWxv_hI358oipx3RNLr1tOxz_zxF5f3pc1i_F_PV5Vt_Pi8Cg7AsEb9baaVw33mnrJBdMgVFOSMUskwLAuLwqqFCosmw4t4JLXZnM3ikxIrenvwERV_sUtjZ9ryTjUkkhfgAr11dZ</recordid><startdate>200604</startdate><enddate>200604</enddate><creator>Bolsens, B.</creator><creator>Van den Keybus, J.</creator><creator>Driesen, J.</creator><creator>Belmans, R.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>200604</creationdate><title>Development of a Measuring Device for the Parasitic Inductance of the DC-link Backplane of an Inverter</title><author>Bolsens, B. ; Van den Keybus, J. ; Driesen, J. ; Belmans, R.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i105t-e0f8b7d7ebcfd7ad42316086d3461a143008d461609e3655c22a3247989e3fd63</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2006</creationdate><topic>backplane</topic><topic>Backplanes</topic><topic>Capacitors</topic><topic>DC-link</topic><topic>high switching frequencies</topic><topic>Inductance measurement</topic><topic>inverter</topic><topic>Inverters</topic><topic>low inductance</topic><topic>Moment methods</topic><topic>Numerical simulation</topic><topic>Oscilloscopes</topic><topic>parasitic inductance</topic><topic>parasitics</topic><topic>Probes</topic><topic>probing</topic><topic>Switches</topic><topic>Topology</topic><toplevel>online_resources</toplevel><creatorcontrib>Bolsens, B.</creatorcontrib><creatorcontrib>Van den Keybus, J.</creatorcontrib><creatorcontrib>Driesen, J.</creatorcontrib><creatorcontrib>Belmans, R.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bolsens, B.</au><au>Van den Keybus, J.</au><au>Driesen, J.</au><au>Belmans, R.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Development of a Measuring Device for the Parasitic Inductance of the DC-link Backplane of an Inverter</atitle><btitle>2006 IEEE Instrumentation and Measurement Technology Conference Proceedings</btitle><stitle>IMTC</stitle><date>2006-04</date><risdate>2006</risdate><spage>1721</spage><epage>1724</epage><pages>1721-1724</pages><issn>1091-5281</issn><isbn>9780780393592</isbn><isbn>0780393597</isbn><eisbn>0780393600</eisbn><eisbn>9780780393608</eisbn><abstract>Four different design options are investigated for a DC-link backplane of an inverter. The backplanes interconnect switches and capacitors and have slots at various positions. The purpose is to evaluate the performance of the four topologies regarding parasitic inductance. A probe is developed to measure these low inductances. The probe is powered from a high-frequency source and is connected to a digital oscilloscope through four differential measurements. The measurements are compared with numerical simulations calculating the inductance with the method of moments. The simulations and the measurements yield similar results</abstract><pub>IEEE</pub><doi>10.1109/IMTC.2006.328218</doi><tpages>4</tpages></addata></record> |
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source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | backplane Backplanes Capacitors DC-link high switching frequencies Inductance measurement inverter Inverters low inductance Moment methods Numerical simulation Oscilloscopes parasitic inductance parasitics Probes probing Switches Topology |
title | Development of a Measuring Device for the Parasitic Inductance of the DC-link Backplane of an Inverter |
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