Development of a Measuring Device for the Parasitic Inductance of the DC-link Backplane of an Inverter

Four different design options are investigated for a DC-link backplane of an inverter. The backplanes interconnect switches and capacitors and have slots at various positions. The purpose is to evaluate the performance of the four topologies regarding parasitic inductance. A probe is developed to measure these low inductances. The probe is powered from a high-frequency source and is connected to a digital oscilloscope through four differential measurements. The measurements are compared with numerical simulations calculating the inductance with the method of moments. The simulations and the measurements yield similar results