A 10-bit 1GSample/s DAC in 90nm CMOS for Embedded Applications

A 90 nm CMOS 10-bit 1 GS/s current-steering D/A converter is presented. It is designed and optimized for next generation high-speed digital communication SoCs. With only five power/ground pins and a 10-bit architecture, 72 dB SFDR and 9.2 ENOB are measured with a full-scale 41.3 MHz input at 800 MS/s. At 1.05 GS/s, 68 dB SFDR is achieved for a full-scale 54.3 MHz input. It dissipates a core power of 49 mW, the lowest power consumption reported at this performance level, and occupies a die area of merely 0.36 mm 2 . The monolithic DAC is fabricated in TSMC 1P9M 90nm CMOS process