An Area Optimized 2.5-V 10-b 200-MS/s 200-μA CMOS DAC

A 10-b 200-MSample/s digital-to-analog converter is optimized for low power and low area with plusmn25%, 0.1% incremental gain control. The converter uses a combined thermometer coded current-steering DAC and an R-2R load to achieve a compact layout and sub-muA LSB current. It provides more than 61dB spurious-free dynamic range over 50MHz bandwidth within -20degC to +95degC temperature range and plusmn10% supply variation from a dual 2.5/1.8-V supply. The differential and integral non-linearity of the converter are within plusmn0.1LSB. The 0.55mm times 0.47mm converter is implemented in a 0.35/0.18-mum CMOS technology and the DAC core dissipates only 200muA static current from a 2.5V analog supply