Testable design environment with test-added tools

A testable design environment with test-added tools is presented. These programs check whether the circuit design violates testable rules, locate the sources of poor testability, and calculate toggle rate of the circuit. A testable design flow is introduced and functions of the programs are describe...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Yih-June Liou, Wei-Shiou Wu, Mely Chen Chi
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A testable design environment with test-added tools is presented. These programs check whether the circuit design violates testable rules, locate the sources of poor testability, and calculate toggle rate of the circuit. A testable design flow is introduced and functions of the programs are described. The system is in production use and some experimental results are also shown.< >
DOI:10.1109/ASIC.1993.410806