Open Source On-Chip Logic Analyzer for FPGA-s
In this paper, principles of an FPGA internal logic analyzer are presented. The analyzer code is written in VHDL and inserted into design at the source description level. This allows to keep it independent of used design software and FPGA architecture. This analyzer was created under GPL license so...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Schreiben Sie den ersten Kommentar!