A GF(24m) Inverter and its Application in a Reconfigurable Tate Pairing Processor

A GF(24m) Inverter and its Application in a Reconfigurable Tate Pairing Processor

This paper details an architecture for performing inversion in the field GF(2 4m ), which is the field used in computing the Tate pairing on characteristic 2 supersingular elliptic curves. The inverter architecture is then used to improve the performance of a reconfigurable Tate pairing hardware acc...

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Hauptverfasser: Keller, M., Ronan, R., Marnane, W., Murphy, C.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Acceleration
Computer architecture
Elliptic curve cryptography
Elliptic curves
Field programmable gate arrays
Hardware
Identity-based encryption
Inverters
Public key
Public key cryptography
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Beschreibung
Zusammenfassung:This paper details an architecture for performing inversion in the field GF(2 4m ), which is the field used in computing the Tate pairing on characteristic 2 supersingular elliptic curves. The inverter architecture is then used to improve the performance of a reconfigurable Tate pairing hardware accelerator. Implementation results for the improved processor on an FPGA are presented and compared to those of the basic processor without the inverter
ISSN:2325-6532
2640-0472
DOI:10.1109/RECONF.2006.307766