An Improved ASIC/SOC Design Methodology for Quick Design Convergence

An Improved ASIC/SOC Design Methodology for Quick Design Convergence

An improved ASIC/SOC design methodology for quick design convergence is described in this paper. Unlike the conventional ASIC/SOC design methodologies focused on automation, our new methodology focuses on streamlining the ASIC/SOC flow's timing consuming steps by applying our expert's BKM&...

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Bibliographische Detailangaben
Hauptverfasser: Yuyun Liao, Mehta, G., Abdel Karim, R., Le, V., Gandhi, J.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Acceleration
Application specific integrated circuits
Convergence
Design automation
Design methodology
Logic design
Process design
Routing
Scheduling
Timing
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Beschreibung
Zusammenfassung:An improved ASIC/SOC design methodology for quick design convergence is described in this paper. Unlike the conventional ASIC/SOC design methodologies focused on automation, our new methodology focuses on streamlining the ASIC/SOC flow's timing consuming steps by applying our expert's BKM's (best known methodology) to accelerate design convergence. It enabled us to shorten the time consuming phases dramatically with relatively minimal efforts. This resulted in smooth execution across different phases of the design and enabled us to meet the aggressive tape-out schedule
DOI:10.1109/ICSICT.2006.306496