Fully automated semiconductor operating condition testing

In this article we present a test flow for fully automated operating condition testing (AOCT) for semiconductor devices. The test flow consists of three major modules to provide maximum test coverage, automated identification of fault related operating conditions and localization of the range of these conditions, i.e. the pass-to-fail transitions with high resolution. For maximum coverage when testing for many independent timing and level conditions at the same time we use a Monte Carlo approach as the first step of the flow. In the second module fault related operating conditions are identified by analyzing the distribution of failure conditions through a novel statistical approach. The third module of the flow localizes the multidimensional pass-to-fail transitions. We present two algorithmic options, not previously applied for operating condition testing, one based on a Genetic Algorithm search and the second one based on the recursive divide-and-conquer principle. We finally present an application example of the flow to memory devices. The test flow can be implemented on all ATE's supporting a programming or scripting language for control of the tester