Reducing Charge Injection in Active-Matrix a-Si TFT Pixels

A technique for reducing charge injection in active-matrix amorphous silicon thin film transistor pixels is presented. Using a gate pulse with two falling rates, more than 50% reduction in the induced error voltage was achieved

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Bibliographische Detailangaben
Hauptverfasser: Ashtiani, S.J., Nathan, A.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:A technique for reducing charge injection in active-matrix amorphous silicon thin film transistor pixels is presented. Using a gate pulse with two falling rates, more than 50% reduction in the induced error voltage was achieved
ISSN:1092-8081
2766-1733
DOI:10.1109/LEOS.2006.279204