Unlocal Heat Generation Picualitiers in High Power Submicrometer Gate FET'S

Simple model for heat generation area size depending on transistor topology and active layers properties is developed. It is shown that real heat generation area size is much less than transistor structure period and the gate drain distance. By three-dimension modeling it is shown that taking into a...

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Hauptverfasser: Dudinov, K.V., Ippolitov, V.M., Pashkovsky, A.B.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:Simple model for heat generation area size depending on transistor topology and active layers properties is developed. It is shown that real heat generation area size is much less than transistor structure period and the gate drain distance. By three-dimension modeling it is shown that taking into account real heat generation area size raised estimated channel temperature by 10-30 degC
DOI:10.1109/CRMICO.2006.256372