Design of a Reconfigurable Processor for NIST Prime Field ECC

Design of a Reconfigurable Processor for NIST Prime Field ECC

This paper describes a reconfigurable processor that provides support for basic elliptic curve cryptographic (ECC) operations over GF(p), such as modular addition, subtraction, multiplication, and inversion. The proposed processor can be configured for any of the five NIST primes with sizes ranging...

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Bibliographische Detailangaben
Hauptverfasser: Ananyi, K., Rakhmatov, D.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Adders
Arithmetic
Decoding
Elliptic curve cryptography
Hardware
Inverters
NIST
Read-write memory
Registers
Signal processing
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Beschreibung
Zusammenfassung:This paper describes a reconfigurable processor that provides support for basic elliptic curve cryptographic (ECC) operations over GF(p), such as modular addition, subtraction, multiplication, and inversion. The proposed processor can be configured for any of the five NIST primes with sizes ranging from 192 to 521 bits
DOI:10.1109/FCCM.2006.36