Reliability of sub 30NM BT(Body-Tied)-FinFET with HFSION/Poly Silicon Gate Stack for symmetric Vth control

In this paper, a symmetric threshold voltage of W fin =10nm FinFET has been achieved by using HfSiON dielectric (V tn = 0.25V / V tp = -0.28V) since the threshold voltage control (>|0.2V|) of 10nm FinFET is problematic because the body is fully depleted. Fermi level pinning and low boron segregation effects of HfSiON are the main mechanisms determining appropriate threshold voltages. And the reliability issues (shift of J G , G M and I CP according to stress and hot carrier life time) of HfSiON and Gnox dielectric with various fin width have been also evaluated for the first time