A compact and power efficient GSM vocoder

A compact and power efficient GSM vocoder

A single-chip implementation of the GSM full-rate vocoder is presented. Maximum integration has been achieved by the use of DSP (digital signal processing) CORE technology. All aspects of this design methodology are described. This component is one of the key building blocks of the ALCATEL GSM handp...

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Bibliographische Detailangaben
Hauptverfasser: Vanzieleghem, E., Schelfhout, K., Dartois, L., Wenin, J., Vanwelsenaers, A., Rabaey, D.H.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
CMOS process
CMOS technology
Demodulation
Design methodology
Digital signal processing chips
GSM
Process design
Productivity
Signal design
Vocoders
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Beschreibung
Zusammenfassung:A single-chip implementation of the GSM full-rate vocoder is presented. Maximum integration has been achieved by the use of DSP (digital signal processing) CORE technology. All aspects of this design methodology are described. This component is one of the key building blocks of the ALCATEL GSM handportable station. This chip is designed in a shrinkable 1.2 /spl mu/m CMOS process resulting in a 85 mm/sup 2/ die size. The efficiency of the DSP CORE methodology (size, signal processing time, and design productivity) for implementation of complex processing functions like GSM vocoder or digital demodulation has been demonstrated.< >
DOI:10.1109/ICC.1993.397258