Automated load-independent cell library macromodeling for efficient and accurate waveform simulation

A novel gate-level macromodeling technique is presented. In an attempt to address the increasingly analog behavior of signals in semi-custom digital designs, the technique produces a linear transient macromodel capable of accurately predicting the gate output voltage waveform over a wide range of input and loading conditions. The macromodel is derived by analyzing SPICE generated voltage and current responses for a set of "extreme" operating conditions and is shown to exhibit good waveform prediction capability and average performance errors of approximately /spl plusmn/10%.< >