A VLSI architecture for fast inversion in GF(2/sup m/)

A new algorithm for performing fast inversion in GF (2/sup m/) is presented. The algorithm requires O(mlog/sub 2/ m) computation time. Using serial-in-parallel-out multiplication, the design of the algorithm is highly regular, modular, and well suited for VLSI implementation.< >

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Bibliographische Detailangaben
Veröffentlicht in:	IEEE transactions on computers 1989-10, Vol.38 (10), p.1383-1386
1. Verfasser:	Feng, G.-L.
Format:	Artikel
Sprache:	eng
Schlagworte:	Algorithm design and analysis Applied sciences Coding, codes Computer architecture Cryptography Decoding Error correction codes Exact sciences and technology Galois fields Information, signal and communications theory Pipelines Reed-Solomon codes Signal and communications theory Signal processing algorithms Telecommunications and information theory Very large scale integration
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Beschreibung
Zusammenfassung:	A new algorithm for performing fast inversion in GF (2/sup m/) is presented. The algorithm requires O(mlog/sub 2/ m) computation time. Using serial-in-parallel-out multiplication, the design of the algorithm is highly regular, modular, and well suited for VLSI implementation.< >
ISSN:	0018-9340 1557-9956
DOI:	10.1109/12.35833