On the performance of a multi-threaded RISC architecture

Multi-threading is a form of parallel processing in which the processor contains several independent contexts which share a single execution pipeline. We propose a new multi-threaded architecture which differs from previous architectures in that context switches are performed only when the running program cannot execute an instruction in the next cycle. We argue that this strategy can improve pipeline utilization in environments which do not have a large enough number of processes to fully utilize earlier multi-threaded machines.< >