Design SRAMs for burn-in

SRAM designers and product engineers must balance the diverse aspects involved in developing and manufacturing quality ICs. This paper describes how cost and complexity design techniques to improve burn-in, noting implications for performance, power and density.< >

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Hauptverfasser: Reohr, W., Yuen Chan, Plass, D., Pelella, A., Wu, P.
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creator Reohr, W.
Yuen Chan
Plass, D.
Pelella, A.
Wu, P.
description SRAM designers and product engineers must balance the diverse aspects involved in developing and manufacturing quality ICs. This paper describes how cost and complexity design techniques to improve burn-in, noting implications for performance, power and density.< >
doi_str_mv 10.1109/VTEST.1993.313330
format Conference Proceeding
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identifier ISBN: 9780818638305
ispartof Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium, 1993, p.164-170
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language eng
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Aging
Built-in self-test
Chip scale packaging
Circuit testing
Compressors
Conductors
Costs
Heating
Ovens
Random access memory
title Design SRAMs for burn-in
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