Design SRAMs for burn-in

Design SRAMs for burn-in

SRAM designers and product engineers must balance the diverse aspects involved in developing and manufacturing quality ICs. This paper describes how cost and complexity design techniques to improve burn-in, noting implications for performance, power and density.< >

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Bibliographische Detailangaben
Hauptverfasser: Reohr, W., Yuen Chan, Plass, D., Pelella, A., Wu, P.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Aging
Built-in self-test
Chip scale packaging
Circuit testing
Compressors
Conductors
Costs
Heating
Ovens
Random access memory
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Beschreibung
Zusammenfassung:SRAM designers and product engineers must balance the diverse aspects involved in developing and manufacturing quality ICs. This paper describes how cost and complexity design techniques to improve burn-in, noting implications for performance, power and density.< >
DOI:10.1109/VTEST.1993.313330