A software-hardware cosynthesis approach to digital system simulation
Our approach to digital system simulation compiles a high-level system model into a high-performance simulator that consists of software and hardware components. The target architecture for the simulation compiler is a tightly coupled processor and field-programmable gate array. We describe the simu...
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| Veröffentlicht in: | IEEE MICRO 1994-08, Vol.14 (4), p.48-58 |
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| container_end_page | 58 |
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| container_issue | 4 |
| container_start_page | 48 |
| container_title | IEEE MICRO |
| container_volume | 14 |
| creator | Olukotun, K.A. Helaihel, R. Levitt, J. Ramirez, R. |
| description | Our approach to digital system simulation compiles a high-level system model into a high-performance simulator that consists of software and hardware components. The target architecture for the simulation compiler is a tightly coupled processor and field-programmable gate array. We describe the simulation compiler and show how it can be used to improve simulation performance by up to a factor of two over an all-software simulator.< > |
| doi_str_mv | 10.1109/40.296157 |
| format | Article |
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| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 0272-1732 |
| ispartof | IEEE MICRO, 1994-08, Vol.14 (4), p.48-58 |
| issn | 0272-1732 1937-4143 |
| language | eng |
| recordid | cdi_ieee_primary_296157 |
| source | IEEE Electronic Library (IEL) |
| subjects | Acceleration Compilers Computer architecture Design Digital systems Field programmable gate arrays Hardware design languages Logic Optimizing compilers Process design Program processors Simulation Software Software performance |
| title | A software-hardware cosynthesis approach to digital system simulation |
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