A software-hardware cosynthesis approach to digital system simulation

A software-hardware cosynthesis approach to digital system simulation

Our approach to digital system simulation compiles a high-level system model into a high-performance simulator that consists of software and hardware components. The target architecture for the simulation compiler is a tightly coupled processor and field-programmable gate array. We describe the simu...

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Veröffentlicht in:IEEE MICRO 1994-08, Vol.14 (4), p.48-58
Hauptverfasser: Olukotun, K.A., Helaihel, R., Levitt, J., Ramirez, R.
Format: Artikel
Sprache:eng
Schlagworte:
Acceleration
Compilers
Computer architecture
Design
Digital systems
Field programmable gate arrays
Hardware design languages
Logic
Optimizing compilers
Process design
Program processors
Simulation
Software
Software performance
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Zusammenfassung:Our approach to digital system simulation compiles a high-level system model into a high-performance simulator that consists of software and hardware components. The target architecture for the simulation compiler is a tightly coupled processor and field-programmable gate array. We describe the simulation compiler and show how it can be used to improve simulation performance by up to a factor of two over an all-software simulator.< >
ISSN:0272-1732
1937-4143
DOI:10.1109/40.296157