An all MOS neural-type cell
An improved neural-type cell (NTC) using only MOS devices is presented. To yield neural-type pulse outputs, a load line is passed through the NTC hysteresis. The main contribution of the present work is the design of a nonlinear load line to improve the performance of the NTC. PSPICE simulations for...
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Format: | Tagungsbericht |
Sprache: | eng |
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Zusammenfassung: | An improved neural-type cell (NTC) using only MOS devices is presented. To yield neural-type pulse outputs, a load line is passed through the NTC hysteresis. The main contribution of the present work is the design of a nonlinear load line to improve the performance of the NTC. PSPICE simulations for a MAGIC IC layout using MOSIS parameters are given.< > |
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DOI: | 10.1109/MWSCAS.1991.251998 |