Macropipelining based heterogeneous multiprocessor scheduling

High performance multiprocessing systems have been increasingly using heterogeneous digital signal processors (DSPs) for overall systems gain. Scheduling a DSP algorithm on such a system must address issues of interprocessor communication as well as parallelism extraction for optimal throughput. The...

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Hauptverfasser: Hamada, T., Banerjee, S., Chau, P.M., Fellman, R.D.
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creator Hamada, T.
Banerjee, S.
Chau, P.M.
Fellman, R.D.
description High performance multiprocessing systems have been increasingly using heterogeneous digital signal processors (DSPs) for overall systems gain. Scheduling a DSP algorithm on such a system must address issues of interprocessor communication as well as parallelism extraction for optimal throughput. These issues have been extensively examined for multiprocessor systems incorporating homogeneous processors. A heterogeneous macropipelined scheduling scheme has been described which addresses the aforementioned communication and parallelization issues. The advantage of resorting to a heterogeneous scheme in specific cases is illustrated with examples.< >
doi_str_mv 10.1109/ICASSP.1992.226549
format Conference Proceeding
fullrecord <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_226549</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>226549</ieee_id><sourcerecordid>226549</sourcerecordid><originalsourceid>FETCH-ieee_primary_2265493</originalsourceid><addsrcrecordid>eNp9js0KgkAURi_9QFa-gCtfQLszajqLFiFFLYKgFu3C9GYT6siMLnr7gloHH5zFOYsPwGHoM4ZisU_Xp9PRZ0Jwn_NlFIoBWDyIhccEXoZgizjBzwKMAp6MwGIRR2_JQjGBqTFPREziMLFgdchyrVrZUiUb2ZTuLTNUuA_qSKuSGlK9ceu-6mSrVU7GKO2a_EFF_-nLOYzvWWXI_nEGznZzTneeJKJrq2Wd6df1ezD4K9-yLj0J</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>Macropipelining based heterogeneous multiprocessor scheduling</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Hamada, T. ; Banerjee, S. ; Chau, P.M. ; Fellman, R.D.</creator><creatorcontrib>Hamada, T. ; Banerjee, S. ; Chau, P.M. ; Fellman, R.D.</creatorcontrib><description>High performance multiprocessing systems have been increasingly using heterogeneous digital signal processors (DSPs) for overall systems gain. Scheduling a DSP algorithm on such a system must address issues of interprocessor communication as well as parallelism extraction for optimal throughput. These issues have been extensively examined for multiprocessor systems incorporating homogeneous processors. A heterogeneous macropipelined scheduling scheme has been described which addresses the aforementioned communication and parallelization issues. The advantage of resorting to a heterogeneous scheme in specific cases is illustrated with examples.&lt; &gt;</description><identifier>ISSN: 1520-6149</identifier><identifier>ISBN: 9780780305328</identifier><identifier>ISBN: 0780305329</identifier><identifier>EISSN: 2379-190X</identifier><identifier>DOI: 10.1109/ICASSP.1992.226549</identifier><language>eng</language><publisher>IEEE</publisher><subject>Degradation ; Delay ; Merging ; Partitioning algorithms ; Pipelines ; Processor scheduling ; Scheduling algorithm ; Throughput ; Time measurement ; Utility programs</subject><ispartof>[Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, 1992, Vol.5, p.597-600 vol.5</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/226549$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2051,4035,4036,27904,54898</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/226549$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Hamada, T.</creatorcontrib><creatorcontrib>Banerjee, S.</creatorcontrib><creatorcontrib>Chau, P.M.</creatorcontrib><creatorcontrib>Fellman, R.D.</creatorcontrib><title>Macropipelining based heterogeneous multiprocessor scheduling</title><title>[Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing</title><addtitle>ICASSP</addtitle><description>High performance multiprocessing systems have been increasingly using heterogeneous digital signal processors (DSPs) for overall systems gain. Scheduling a DSP algorithm on such a system must address issues of interprocessor communication as well as parallelism extraction for optimal throughput. These issues have been extensively examined for multiprocessor systems incorporating homogeneous processors. A heterogeneous macropipelined scheduling scheme has been described which addresses the aforementioned communication and parallelization issues. The advantage of resorting to a heterogeneous scheme in specific cases is illustrated with examples.&lt; &gt;</description><subject>Degradation</subject><subject>Delay</subject><subject>Merging</subject><subject>Partitioning algorithms</subject><subject>Pipelines</subject><subject>Processor scheduling</subject><subject>Scheduling algorithm</subject><subject>Throughput</subject><subject>Time measurement</subject><subject>Utility programs</subject><issn>1520-6149</issn><issn>2379-190X</issn><isbn>9780780305328</isbn><isbn>0780305329</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>1992</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNp9js0KgkAURi_9QFa-gCtfQLszajqLFiFFLYKgFu3C9GYT6siMLnr7gloHH5zFOYsPwGHoM4ZisU_Xp9PRZ0Jwn_NlFIoBWDyIhccEXoZgizjBzwKMAp6MwGIRR2_JQjGBqTFPREziMLFgdchyrVrZUiUb2ZTuLTNUuA_qSKuSGlK9ceu-6mSrVU7GKO2a_EFF_-nLOYzvWWXI_nEGznZzTneeJKJrq2Wd6df1ezD4K9-yLj0J</recordid><startdate>1992</startdate><enddate>1992</enddate><creator>Hamada, T.</creator><creator>Banerjee, S.</creator><creator>Chau, P.M.</creator><creator>Fellman, R.D.</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>1992</creationdate><title>Macropipelining based heterogeneous multiprocessor scheduling</title><author>Hamada, T. ; Banerjee, S. ; Chau, P.M. ; Fellman, R.D.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_2265493</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>1992</creationdate><topic>Degradation</topic><topic>Delay</topic><topic>Merging</topic><topic>Partitioning algorithms</topic><topic>Pipelines</topic><topic>Processor scheduling</topic><topic>Scheduling algorithm</topic><topic>Throughput</topic><topic>Time measurement</topic><topic>Utility programs</topic><toplevel>online_resources</toplevel><creatorcontrib>Hamada, T.</creatorcontrib><creatorcontrib>Banerjee, S.</creatorcontrib><creatorcontrib>Chau, P.M.</creatorcontrib><creatorcontrib>Fellman, R.D.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Hamada, T.</au><au>Banerjee, S.</au><au>Chau, P.M.</au><au>Fellman, R.D.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>Macropipelining based heterogeneous multiprocessor scheduling</atitle><btitle>[Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing</btitle><stitle>ICASSP</stitle><date>1992</date><risdate>1992</risdate><volume>5</volume><spage>597</spage><epage>600 vol.5</epage><pages>597-600 vol.5</pages><issn>1520-6149</issn><eissn>2379-190X</eissn><isbn>9780780305328</isbn><isbn>0780305329</isbn><abstract>High performance multiprocessing systems have been increasingly using heterogeneous digital signal processors (DSPs) for overall systems gain. Scheduling a DSP algorithm on such a system must address issues of interprocessor communication as well as parallelism extraction for optimal throughput. These issues have been extensively examined for multiprocessor systems incorporating homogeneous processors. A heterogeneous macropipelined scheduling scheme has been described which addresses the aforementioned communication and parallelization issues. The advantage of resorting to a heterogeneous scheme in specific cases is illustrated with examples.&lt; &gt;</abstract><pub>IEEE</pub><doi>10.1109/ICASSP.1992.226549</doi></addata></record>
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identifier ISSN: 1520-6149
ispartof [Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing, 1992, Vol.5, p.597-600 vol.5
issn 1520-6149
2379-190X
language eng
recordid cdi_ieee_primary_226549
source IEEE Electronic Library (IEL) Conference Proceedings
subjects Degradation
Delay
Merging
Partitioning algorithms
Pipelines
Processor scheduling
Scheduling algorithm
Throughput
Time measurement
Utility programs
title Macropipelining based heterogeneous multiprocessor scheduling
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-25T16%3A43%3A52IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=Macropipelining%20based%20heterogeneous%20multiprocessor%20scheduling&rft.btitle=%5BProceedings%5D%20ICASSP-92:%201992%20IEEE%20International%20Conference%20on%20Acoustics,%20Speech,%20and%20Signal%20Processing&rft.au=Hamada,%20T.&rft.date=1992&rft.volume=5&rft.spage=597&rft.epage=600%20vol.5&rft.pages=597-600%20vol.5&rft.issn=1520-6149&rft.eissn=2379-190X&rft.isbn=9780780305328&rft.isbn_list=0780305329&rft_id=info:doi/10.1109/ICASSP.1992.226549&rft_dat=%3Cieee_6IE%3E226549%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=226549&rfr_iscdi=true