Macropipelining based heterogeneous multiprocessor scheduling

High performance multiprocessing systems have been increasingly using heterogeneous digital signal processors (DSPs) for overall systems gain. Scheduling a DSP algorithm on such a system must address issues of interprocessor communication as well as parallelism extraction for optimal throughput. These issues have been extensively examined for multiprocessor systems incorporating homogeneous processors. A heterogeneous macropipelined scheduling scheme has been described which addresses the aforementioned communication and parallelization issues. The advantage of resorting to a heterogeneous scheme in specific cases is illustrated with examples.< >