VLSI implementation of an image compression algorithm with a new bit rate control capability

VLSI implementation of an image compression algorithm with a new bit rate control capability

An image compression algorithm with a new bit rate control capability is presented. The bit rate control technique is developed for use in conjunction with the JPEG baseline image compression algorithm. The new method is an extension of the previously developed algorithm which is implemented in the...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Razavi, A., Adar, R., Shenberg, I., Retter, R., Friedlander, R.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Bit rate
Block codes
Decoding
Discrete cosine transforms
Image coding
Image generation
Image storage
Pulse modulation
Quantization
Very large scale integration
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:An image compression algorithm with a new bit rate control capability is presented. The bit rate control technique is developed for use in conjunction with the JPEG baseline image compression algorithm. The new method is an extension of the previously developed algorithm which is implemented in the Zoran 031 image compression chip set. The chip set comprises a discrete cosine transform (DCT) processor and an image compression coder/decoder. Both methods and the chip set are discussed in detail.< >
ISSN:1520-6149
2379-190X
DOI:10.1109/ICASSP.1992.226507