Area-efficient architectures for the Viterbi algorithm II. Applications
In part I the theoretical foundations of a new class of area-efficient architectures for the Viterbi algorithm were established. Area-efficient architectures for practical codes are presented here to illustrate the design procedures and demonstrate the favourable area-time tradeoff results. Three ex...
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| Veröffentlicht in: | IEEE transactions on communications 1993-05, Vol.41 (5), p.802-807 |
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| container_title | IEEE transactions on communications |
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| creator | Shung, C.B. Lin, H.-D. Cypher, R. Siegel, P.H. Thapar, H.K. |
| description | In part I the theoretical foundations of a new class of area-efficient architectures for the Viterbi algorithm were established. Area-efficient architectures for practical codes are presented here to illustrate the design procedures and demonstrate the favourable area-time tradeoff results. Three examples from convolutional codes, matched-spectral-null (MSN) trellis codes, and Ungerboeck codes are presented. The application of the area-efficient techniques to codes with a very large number of states, codes with time-varying trellises, and a programmable Viterbi decoder is discussed.< > |
| doi_str_mv | 10.1109/26.225495 |
| format | Article |
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| ispartof | IEEE transactions on communications, 1993-05, Vol.41 (5), p.802-807 |
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| source | IEEE Electronic Library (IEL) |
| subjects | Applied sciences Coding, codes Communications Society Convolutional codes Decoding Exact sciences and technology Information, signal and communications theory Modulation coding Partial response channels Pipelines Scheduling Signal and communications theory Signal processing Telecommunications and information theory Very large scale integration Viterbi algorithm |
| title | Area-efficient architectures for the Viterbi algorithm II. Applications |
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