VLSI reliability challenges: from device physics to wafer scale systems
The philosophical and practical differences between Japanese and US IC industries in regard to VLSI reliability, as well as recent research topics and new analysis methods such as wafer scale testing, are discussed. It is suggested that a new approach to VLSI reliability is needed in response to the...
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Veröffentlicht in: | Proceedings of the IEEE 1993-05, Vol.81 (5), p.653-674 |
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Format: | Artikel |
Sprache: | eng |
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Zusammenfassung: | The philosophical and practical differences between Japanese and US IC industries in regard to VLSI reliability, as well as recent research topics and new analysis methods such as wafer scale testing, are discussed. It is suggested that a new approach to VLSI reliability is needed in response to the paradigm shift being brought about by simple scaling limitations, increased process complexity and application of VLSI to advanced systems. An example of this shift is the movement from simple failure analysis by sampling the output of a manufacturing line to the building-in-reliability approach. To introduce and expand on the building-in reliability approach in VLSIs, the authors discuss the required deeper physical understanding of such important processes as hot-carrier effects, dielectrics and metallization.< > |
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ISSN: | 0018-9219 1558-2256 |
DOI: | 10.1109/5.220898 |