Models for bit-true simulation and high-level synthesis of DSP applications

Models for bit-true simulation and high-level synthesis of DSP applications

Real-time DSP applications require a bit-true synthesis system to generate correct and efficient ASICs. This requires concise simulation and synthesis models, which are presented in this paper and exemplified for a non-restoring division operation. Such models are used in the synthesis library of bi...

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Bibliographische Detailangaben
Hauptverfasser: Pauwels, M., Lanneer, D., Catthoor, F., Goossens, G., De Man, H.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Application specific integrated circuits
Digital signal processing
High level synthesis
Kernel
Libraries
Quantization
Real time systems
Signal processing algorithms
Signal synthesis
Timing
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Beschreibung
Zusammenfassung:Real-time DSP applications require a bit-true synthesis system to generate correct and efficient ASICs. This requires concise simulation and synthesis models, which are presented in this paper and exemplified for a non-restoring division operation. Such models are used in the synthesis library of bit-true Cathedral-II compiler, by which industrial size applications have been synthesised.< >
DOI:10.1109/GLSV.1992.218365