On the electrical conduction in the interpolysilicon dielectric layers

To reduce the low-field electrical conductivity of interpolysilicon dielectrics used in electrically erasable programmable read-only (EEPROM) memories devices, the roughness of the poly-SiO/sub 2/ interface until now has been decreased in two ways: (1) by increasing the temperature of oxidation and doping of polysilicon combined with low-pressure chemical vapor deposition (LPCVD) of silicon (undoped or in-situ doped) in the amorphous phase, or (2) by the use of LPCVD high-temperature oxide (HTO) deposited over polycrystalline silicon. The advantages of both methods are combined, and electrical conduction results for an interpoly structure based on LPCVD smooth surface polysilicon and LPCVD HTO SiO/sub 2/ are presented. The data are interpreted in terms of the Fowler-Nordheim mechanism.< >