A monolithic digital chirp synthesizer chip with I and Q channels

A monolithic digital chirp synthesizer chip with I and Q channels

A monolithic digital chirp synthesizer (DCS) chip has been developed using GaAs-AlGaAs HI/sup 2/L technology. The 6500 HBT gate DCs chirp is capable of producing linear frequency-modulated (chirp) waveforms or single frequency waveforms. The major components of the DCS are two 28-bit pipelined accum...

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Bibliographische Detailangaben
Hauptverfasser: Van Andrews, G., Chang, C.T.M., Cayo, J.D., Sabin, S., White, W.A., Harris, M.P.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Chirp
Clocks
Distributed control
Frequency
Gallium arsenide
Heterojunction bipolar transistors
Instruments
Read only memory
Signal generators
Synthesizers
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Zusammenfassung:A monolithic digital chirp synthesizer (DCS) chip has been developed using GaAs-AlGaAs HI/sup 2/L technology. The 6500 HBT gate DCs chirp is capable of producing linear frequency-modulated (chirp) waveforms or single frequency waveforms. The major components of the DCS are two 28-bit pipelined accumulators, a 1.8 kbit sine ROM, a 1.8 kbit cosine ROM, and two 8-bit digital-to-analog converters (DACs). The total chip area is 4.877 mm*6.172 mm using a minimum feature size of 1.5 microns. All components of the DCS are functional and the device has been clocked at 450 MHz.< >
DOI:10.1109/GAAS.1991.172623