Uniaxial and Biaxial Strain for CMOS Performance Enhancement

Uniaxial and Biaxial Strain for CMOS Performance Enhancement

Uniaxial stressors have been mainly employed for boosting PMOS performance, while it is more difficult to increase NMOS performance using tensile stressors. This results in changing the n:p ratio, which requires circuit layout changes. Enhancing both NMOS and PMOS performance to retain the same n:p...

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Hauptverfasser: Nguyen, B.-Y., Zhang, D., Thean, A., Grudowski, P., Vartanian, V., White, T., Zollner, S., Theodore, D., Goolsby, B., Desjardins, H., Prabhu, L., Garcia, R., Hackenberg, J., Dhandapani, V., Murphy, S., Rai, R., Conner, J., Montgomery, P., Parker, C., Hildreth, J., Noble, R., Jahanbani, M., Eades, D., Cheek, J., White, B., Mogab, J., Venkatesan, S.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Capacitive sensors
Germanium silicon alloys
Lattices
Silicon germanium
Strain measurement
Substrates
Tensile strain
Tensile stress
Uniaxial strain
Voltage
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Zusammenfassung:Uniaxial stressors have been mainly employed for boosting PMOS performance, while it is more difficult to increase NMOS performance using tensile stressors. This results in changing the n:p ratio, which requires circuit layout changes. Enhancing both NMOS and PMOS performance to retain the same n:p ratio is desirable. Interactions between biaxial lattice strain, uniaxial relaxation, process-induced stressor and channel orientation have been optimized to achieve the desired stress configurations for enhancing both short-channel SSOI NMOS and PMOS devices
DOI:10.1109/ISTDM.2006.246545