Performance Enhancement of MUGFET Devices Using Super Critical Strained-SOI (SC-SSOI) and CESL

This paper describes the performance of nMOS and pMOS tall triple gate (MUGFET) devices with fin widths down to 20 nm fabricated for the first time on super critical strained Si on insulator (SC-SSOI). The electrical and muRaman measurements show that the tensile strain can be maintained in SSOI sub...

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Hauptverfasser: Collaert, N., Rooyackers, R., Clemente, F., Zimmerman, P., Cayrefourcq, I., Ghyselen, B., San, K., Eyckens, B., Jurczak, M., Biesemans, S.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:This paper describes the performance of nMOS and pMOS tall triple gate (MUGFET) devices with fin widths down to 20 nm fabricated for the first time on super critical strained Si on insulator (SC-SSOI). The electrical and muRaman measurements show that the tensile strain can be maintained in SSOI substrates even for fins as narrow as 20nm giving 80% and 10% drive current increase in long and short channel nMOS devices, respectively. Additionally, the introduction of tensile contact etch stop layers (CESL) improves the nMOS drive current by as much as 35% for short channel devices
ISSN:0743-1562
DOI:10.1109/VLSIT.2006.1705212