430-V 12.4- hboxmOmegacdot hboxcm^2Normally off 4H-SiC Lateral JFET
This letter reports the experimental demonstration of the first 4H-SiC normally off high-voltage lateral junction field-effect transistor. The design and fabrication of such a device have been investigated. The fabricated device has a vertical channel length of 1.8 mum created by tilted aluminum imp...
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| Veröffentlicht in: | IEEE electron device letters 2006-10, Vol.27 (10), p.834-836 |
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| container_title | IEEE electron device letters |
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| creator | Ming Su Kuang Sheng Yuzhu Li Yongxi Zhang Jian Wu Zhao, J.H. Jianhui Zhang Li, L.X. |
| description | This letter reports the experimental demonstration of the first 4H-SiC normally off high-voltage lateral junction field-effect transistor. The design and fabrication of such a device have been investigated. The fabricated device has a vertical channel length of 1.8 mum created by tilted aluminum implantation on the sidewalls of deep trenches and a lateral drift-region length of 5 mum. Normally off operation (V GS =0V) with a blocking voltage V br of 430 V has been achieved with a specific on-resistance R on-sp of 12.4 mOmegamiddotcm 2 , which is the lowest specific on-resistance for 4H-SiC lateral power switches reported to date, resulting in a V br 2 /R on-sp value of 15 MW/cm 2 . This is among the best V br 2 /R on-sp figure-of-merit reported to date for 4H-SiC lateral high-voltage devices |
| doi_str_mv | 10.1109/LED.2006.883057 |
| format | Article |
| fullrecord | <record><control><sourceid>ieee_RIE</sourceid><recordid>TN_cdi_ieee_primary_1704915</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>1704915</ieee_id><sourcerecordid>1704915</sourcerecordid><originalsourceid>FETCH-ieee_primary_17049153</originalsourceid><addsrcrecordid>eNp9ibsOgjAUQBujifiYHVz6A8V7actjRgwxRAeNo6RiUUwbDDDI32uMs9PJOYeQBYKLCNEqS9auB-C7YchBBgPioJQhA-nzIXEgEMg4gj8mk7Z9AKAQgXBILDiwE0XPFYzeL_XL7q2-qeJad18t7Nnb1Y1VxvS0LksqUnaoYpqpTjfK0O0mOc7IqFSm1fMfp2T5qXHKKq11_mwqq5o-xwBEhJL_v29hTzcE</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>430-V 12.4- hboxmOmegacdot hboxcm^2Normally off 4H-SiC Lateral JFET</title><source>IEEE Electronic Library (IEL)</source><creator>Ming Su ; Kuang Sheng ; Yuzhu Li ; Yongxi Zhang ; Jian Wu ; Zhao, J.H. ; Jianhui Zhang ; Li, L.X.</creator><creatorcontrib>Ming Su ; Kuang Sheng ; Yuzhu Li ; Yongxi Zhang ; Jian Wu ; Zhao, J.H. ; Jianhui Zhang ; Li, L.X.</creatorcontrib><description>This letter reports the experimental demonstration of the first 4H-SiC normally off high-voltage lateral junction field-effect transistor. The design and fabrication of such a device have been investigated. The fabricated device has a vertical channel length of 1.8 mum created by tilted aluminum implantation on the sidewalls of deep trenches and a lateral drift-region length of 5 mum. Normally off operation (V GS =0V) with a blocking voltage V br of 430 V has been achieved with a specific on-resistance R on-sp of 12.4 mOmegamiddotcm 2 , which is the lowest specific on-resistance for 4H-SiC lateral power switches reported to date, resulting in a V br 2 /R on-sp value of 15 MW/cm 2 . This is among the best V br 2 /R on-sp figure-of-merit reported to date for 4H-SiC lateral high-voltage devices</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2006.883057</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>IEEE</publisher><subject>Fabrication ; Implantation ; junction field-effect transistor (JFET) ; Monolithic integrated circuits ; MOSFETs ; Nitrogen ; normally OFF ; Predictive models ; Silicon carbide ; silicon carbide (SiC) ; System-on-a-chip ; Temperature ; Two dimensional displays ; vertical channel ; Voltage</subject><ispartof>IEEE electron device letters, 2006-10, Vol.27 (10), p.834-836</ispartof><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1704915$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,777,781,793,27905,27906,54739</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1704915$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Ming Su</creatorcontrib><creatorcontrib>Kuang Sheng</creatorcontrib><creatorcontrib>Yuzhu Li</creatorcontrib><creatorcontrib>Yongxi Zhang</creatorcontrib><creatorcontrib>Jian Wu</creatorcontrib><creatorcontrib>Zhao, J.H.</creatorcontrib><creatorcontrib>Jianhui Zhang</creatorcontrib><creatorcontrib>Li, L.X.</creatorcontrib><title>430-V 12.4- hboxmOmegacdot hboxcm^2Normally off 4H-SiC Lateral JFET</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>This letter reports the experimental demonstration of the first 4H-SiC normally off high-voltage lateral junction field-effect transistor. The design and fabrication of such a device have been investigated. The fabricated device has a vertical channel length of 1.8 mum created by tilted aluminum implantation on the sidewalls of deep trenches and a lateral drift-region length of 5 mum. Normally off operation (V GS =0V) with a blocking voltage V br of 430 V has been achieved with a specific on-resistance R on-sp of 12.4 mOmegamiddotcm 2 , which is the lowest specific on-resistance for 4H-SiC lateral power switches reported to date, resulting in a V br 2 /R on-sp value of 15 MW/cm 2 . This is among the best V br 2 /R on-sp figure-of-merit reported to date for 4H-SiC lateral high-voltage devices</description><subject>Fabrication</subject><subject>Implantation</subject><subject>junction field-effect transistor (JFET)</subject><subject>Monolithic integrated circuits</subject><subject>MOSFETs</subject><subject>Nitrogen</subject><subject>normally OFF</subject><subject>Predictive models</subject><subject>Silicon carbide</subject><subject>silicon carbide (SiC)</subject><subject>System-on-a-chip</subject><subject>Temperature</subject><subject>Two dimensional displays</subject><subject>vertical channel</subject><subject>Voltage</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2006</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9ibsOgjAUQBujifiYHVz6A8V7actjRgwxRAeNo6RiUUwbDDDI32uMs9PJOYeQBYKLCNEqS9auB-C7YchBBgPioJQhA-nzIXEgEMg4gj8mk7Z9AKAQgXBILDiwE0XPFYzeL_XL7q2-qeJad18t7Nnb1Y1VxvS0LksqUnaoYpqpTjfK0O0mOc7IqFSm1fMfp2T5qXHKKq11_mwqq5o-xwBEhJL_v29hTzcE</recordid><startdate>200610</startdate><enddate>200610</enddate><creator>Ming Su</creator><creator>Kuang Sheng</creator><creator>Yuzhu Li</creator><creator>Yongxi Zhang</creator><creator>Jian Wu</creator><creator>Zhao, J.H.</creator><creator>Jianhui Zhang</creator><creator>Li, L.X.</creator><general>IEEE</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope></search><sort><creationdate>200610</creationdate><title>430-V 12.4- hboxmOmegacdot hboxcm^2Normally off 4H-SiC Lateral JFET</title><author>Ming Su ; Kuang Sheng ; Yuzhu Li ; Yongxi Zhang ; Jian Wu ; Zhao, J.H. ; Jianhui Zhang ; Li, L.X.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_17049153</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Fabrication</topic><topic>Implantation</topic><topic>junction field-effect transistor (JFET)</topic><topic>Monolithic integrated circuits</topic><topic>MOSFETs</topic><topic>Nitrogen</topic><topic>normally OFF</topic><topic>Predictive models</topic><topic>Silicon carbide</topic><topic>silicon carbide (SiC)</topic><topic>System-on-a-chip</topic><topic>Temperature</topic><topic>Two dimensional displays</topic><topic>vertical channel</topic><topic>Voltage</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Ming Su</creatorcontrib><creatorcontrib>Kuang Sheng</creatorcontrib><creatorcontrib>Yuzhu Li</creatorcontrib><creatorcontrib>Yongxi Zhang</creatorcontrib><creatorcontrib>Jian Wu</creatorcontrib><creatorcontrib>Zhao, J.H.</creatorcontrib><creatorcontrib>Jianhui Zhang</creatorcontrib><creatorcontrib>Li, L.X.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Ming Su</au><au>Kuang Sheng</au><au>Yuzhu Li</au><au>Yongxi Zhang</au><au>Jian Wu</au><au>Zhao, J.H.</au><au>Jianhui Zhang</au><au>Li, L.X.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>430-V 12.4- hboxmOmegacdot hboxcm^2Normally off 4H-SiC Lateral JFET</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2006-10</date><risdate>2006</risdate><volume>27</volume><issue>10</issue><spage>834</spage><epage>836</epage><pages>834-836</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>This letter reports the experimental demonstration of the first 4H-SiC normally off high-voltage lateral junction field-effect transistor. The design and fabrication of such a device have been investigated. The fabricated device has a vertical channel length of 1.8 mum created by tilted aluminum implantation on the sidewalls of deep trenches and a lateral drift-region length of 5 mum. Normally off operation (V GS =0V) with a blocking voltage V br of 430 V has been achieved with a specific on-resistance R on-sp of 12.4 mOmegamiddotcm 2 , which is the lowest specific on-resistance for 4H-SiC lateral power switches reported to date, resulting in a V br 2 /R on-sp value of 15 MW/cm 2 . This is among the best V br 2 /R on-sp figure-of-merit reported to date for 4H-SiC lateral high-voltage devices</abstract><pub>IEEE</pub><doi>10.1109/LED.2006.883057</doi></addata></record> |
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| ispartof | IEEE electron device letters, 2006-10, Vol.27 (10), p.834-836 |
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| source | IEEE Electronic Library (IEL) |
| subjects | Fabrication Implantation junction field-effect transistor (JFET) Monolithic integrated circuits MOSFETs Nitrogen normally OFF Predictive models Silicon carbide silicon carbide (SiC) System-on-a-chip Temperature Two dimensional displays vertical channel Voltage |
| title | 430-V 12.4- hboxmOmegacdot hboxcm^2Normally off 4H-SiC Lateral JFET |
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