A 4b/cell NROM 1Gb Data-Storage Memory

A 4b/cell 1Gb data flash based on a low-cost NROM process technology is achieved. The design includes a two-phase programming algorithm for supporting a fast and accurate threshold-voltage control. The read scheme incorporates a simple error-detection mechanism combined with an accurate drain-side s...

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Bibliographische Detailangaben
Hauptverfasser:	Polansky, Y., Lavan, A., Ran Sahar, Dadashev, O., Betser, Y., Cohen, G., Maayan, E., Eitan, B., Ful-Long Ni, Yen-Hui Joseph Ku, Chih-Yuan Lu, Tim Chang-Ting Chen, Chun-Yu Liao, Chin-Hung Chang, Chung-Kuang Chen, Wen-Chiao Ho, Yite Shih, Wenchi Ting, Wenpin Lu
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Capacitors Costs Dielectrics Manufacturing processes Microcontrollers Nonvolatile memory Parallel programming Radio access networks Read only memory Semiconductor device manufacture
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Beschreibung
Zusammenfassung:	A 4b/cell 1Gb data flash based on a low-cost NROM process technology is achieved. The design includes a two-phase programming algorithm for supporting a fast and accurate threshold-voltage control. The read scheme incorporates a simple error-detection mechanism combined with an accurate drain-side sensing circuit with a built-in offset cancellation
ISSN:	0193-6530 2376-8606
DOI:	10.1109/ISSCC.2006.1696077