A CMOS SoC for 56/18/16 CD/DVD-dual/RAM applications

A SoC, integrating RF/AFE and 1.5 Gb/s SATA PHY, is presented. It supports 471 Mb/s bit-rate at 18timesS DVD. A partial parity mode reduces SDRAM bandwidth. A power control mode minimizes system clock rate. The SoC has 10M transistors, occupies 5.4 times 5.1 mm 2 in 0.18 mm CMOS process, and consume...

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Hauptverfasser:	Jyh-Shin Pan, Hao-Cheng Chen, Bing-Yu Hsieh, Hong-Ching Chen, Lee, R., Ching-Ho Chu, Yuan-Chin Liu, Chuan Liu, Lily Huang, Chang-Long Wu, Meng-Hsueh Lin, Chun-Yiu Lin, Shang-Nien Tsai, Jenn-Ning Yang, Chang-Po Ma, Yung Cheng, Shu-Hung Chou, Hsiu-Chen Peng, Peng-Chuan Huang, Chiu, B., Ho, A.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Bandwidth Clocks CMOS Costs Design DVD-RAM Optical filters Optical recording Optical Storage Physical layer Radio frequency Read-write memory SATA SDRAM Verification WSR
Online-Zugang:	Volltext bestellen
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Beschreibung
Zusammenfassung:	A SoC, integrating RF/AFE and 1.5 Gb/s SATA PHY, is presented. It supports 471 Mb/s bit-rate at 18timesS DVD. A partial parity mode reduces SDRAM bandwidth. A power control mode minimizes system clock rate. The SoC has 10M transistors, occupies 5.4 times 5.1 mm 2 in 0.18 mm CMOS process, and consumes 772 mW during 16timesS DVD read
ISSN:	0738-100X
DOI:	10.1109/DAC.2006.229249