Modular LSI Control Logic Design with Error Detection

Modular LSI Control Logic Design with Error Detection

This paper describes a modular approach of implementing the control circuitry. It is achieved by the use of multifunctional binary decoder circuits in conjunction with a transistor array high-speed READ-ONLY memory.

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:IEEE transactions on computers 1971-02, Vol.C-20 (2), p.161-166
1. Verfasser: Toy, W.N.
Format: Artikel
Sprache:eng
Schlagworte:
Binary decoder
combinational circuits
control logic
digital computer
error detection
integrated circuits
micro-program control
parity check
READ-ONLY memory
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This paper describes a modular approach of implementing the control circuitry. It is achieved by the use of multifunctional binary decoder circuits in conjunction with a transistor array high-speed READ-ONLY memory.
ISSN:0018-9340
1557-9956
DOI:10.1109/T-C.1971.223206