Hafnium silicate nanocrystal memory using sol-gel-spin-coating method
The authors fabricate the hafnium silicate nanocrystal memory for the first time using a very simple sol-gel-spin-coating method and 900 degC 1-min rapid thermal annealing (RTA). From the TEM identification, the nanocrystals are formed as the charge trapping layer after 900 degC 1-min RTA and the si...
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Veröffentlicht in: | IEEE electron device letters 2006-08, Vol.27 (8), p.644-646 |
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creator | YOU, Hsin-Chiang HSU, Tze-Hsiang KO, Fu-Hsiang HUANG, Jiang-Wen LEI, Tan-Fu |
description | The authors fabricate the hafnium silicate nanocrystal memory for the first time using a very simple sol-gel-spin-coating method and 900 degC 1-min rapid thermal annealing (RTA). From the TEM identification, the nanocrystals are formed as the charge trapping layer after 900 degC 1-min RTA and the size is about 5 nm. They demonstrate the composition of nanocrystal is hafnium silicate from the X-ray-photoelectron-spectroscopy analysis. They verify the electric properties in terms of program/erase (P/E) speed, charge retention, and endurance. The sol-gel device exhibits the long charge retention time of 10 4 s with only 6% charge loss, and good endurance performance for P/E cycles up to 10 5 |
doi_str_mv | 10.1109/LED.2006.879022 |
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From the TEM identification, the nanocrystals are formed as the charge trapping layer after 900 degC 1-min RTA and the size is about 5 nm. They demonstrate the composition of nanocrystal is hafnium silicate from the X-ray-photoelectron-spectroscopy analysis. They verify the electric properties in terms of program/erase (P/E) speed, charge retention, and endurance. The sol-gel device exhibits the long charge retention time of 10 4 s with only 6% charge loss, and good endurance performance for P/E cycles up to 10 5</description><identifier>ISSN: 0741-3106</identifier><identifier>EISSN: 1558-0563</identifier><identifier>DOI: 10.1109/LED.2006.879022</identifier><identifier>CODEN: EDLEDZ</identifier><language>eng</language><publisher>New York, NY: IEEE</publisher><subject>Applied sciences ; Charge ; Charge (electric) ; Charge retention ; Chemical vapor deposition ; Coatings ; Design. Technologies. Operation analysis. Testing ; Devices ; Durability ; Electric charge ; Electron traps ; Electronics ; Endurance ; Exact sciences and technology ; Hafnium ; hafnium silicate ; Integrated circuits ; Integrated circuits by function (including memories and processors) ; Molecular electronics, nanoelectronics ; nanocrystal memory ; Nanocrystals ; Performance loss ; Rapid thermal annealing ; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices ; Silicates ; Silicon ; Sol-gel processes ; sol-gel spin coating ; SONOS devices ; Tunneling</subject><ispartof>IEEE electron device letters, 2006-08, Vol.27 (8), p.644-646</ispartof><rights>2006 INIST-CNRS</rights><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2006</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c490t-42abd92b33e9ad07c2ab5904a15cd23521a39d63816df50a33b31da9870d41343</citedby><cites>FETCH-LOGICAL-c490t-42abd92b33e9ad07c2ab5904a15cd23521a39d63816df50a33b31da9870d41343</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/1661717$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,780,784,796,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/1661717$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttp://pascal-francis.inist.fr/vibad/index.php?action=getRecordDetail&idt=17998013$$DView record in Pascal Francis$$Hfree_for_read</backlink></links><search><creatorcontrib>YOU, Hsin-Chiang</creatorcontrib><creatorcontrib>HSU, Tze-Hsiang</creatorcontrib><creatorcontrib>KO, Fu-Hsiang</creatorcontrib><creatorcontrib>HUANG, Jiang-Wen</creatorcontrib><creatorcontrib>LEI, Tan-Fu</creatorcontrib><title>Hafnium silicate nanocrystal memory using sol-gel-spin-coating method</title><title>IEEE electron device letters</title><addtitle>LED</addtitle><description>The authors fabricate the hafnium silicate nanocrystal memory for the first time using a very simple sol-gel-spin-coating method and 900 degC 1-min rapid thermal annealing (RTA). From the TEM identification, the nanocrystals are formed as the charge trapping layer after 900 degC 1-min RTA and the size is about 5 nm. They demonstrate the composition of nanocrystal is hafnium silicate from the X-ray-photoelectron-spectroscopy analysis. They verify the electric properties in terms of program/erase (P/E) speed, charge retention, and endurance. The sol-gel device exhibits the long charge retention time of 10 4 s with only 6% charge loss, and good endurance performance for P/E cycles up to 10 5</description><subject>Applied sciences</subject><subject>Charge</subject><subject>Charge (electric)</subject><subject>Charge retention</subject><subject>Chemical vapor deposition</subject><subject>Coatings</subject><subject>Design. Technologies. Operation analysis. Testing</subject><subject>Devices</subject><subject>Durability</subject><subject>Electric charge</subject><subject>Electron traps</subject><subject>Electronics</subject><subject>Endurance</subject><subject>Exact sciences and technology</subject><subject>Hafnium</subject><subject>hafnium silicate</subject><subject>Integrated circuits</subject><subject>Integrated circuits by function (including memories and processors)</subject><subject>Molecular electronics, nanoelectronics</subject><subject>nanocrystal memory</subject><subject>Nanocrystals</subject><subject>Performance loss</subject><subject>Rapid thermal annealing</subject><subject>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</subject><subject>Silicates</subject><subject>Silicon</subject><subject>Sol-gel processes</subject><subject>sol-gel spin coating</subject><subject>SONOS devices</subject><subject>Tunneling</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2006</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNp9kM1r3DAQxUVoIduk5x56MYHSXLyZkWTJOpZk8wELvSRnMSvLqYJtbST7sP99bDYQ6CGnYWZ-7w3zGPuBsEYEc7Xd3Kw5gFrX2gDnJ2yFVVWXUCnxha1ASywFgjpl33J-AUAptVyxzT21Q5j6IocuOBp9MdAQXTrkkbqi931Mh2LKYXgucuzKZ9-VeR-G0kUal2Hvx3-xOWdfW-qy__5ez9jT7ebx-r7c_r17uP6zLZ00MJaS064xfCeEN9SAdnNfGZCElWu4qDiSMI0SNaqmrYCE2AlsyNQaGolCijP2--i7T_F18nm0fcjOdx0NPk7Z1kZxqASombz8lESlF0POxYxe_Ie-xCkN8x_WIEdEofQMXR0hl2LOybd2n0JP6WAR7JK_nfO3S_72mP-s-PVuS9lR1yYaXMgfMm1MDbic_3nkgvf-Y60UatTiDfhWjAA</recordid><startdate>20060801</startdate><enddate>20060801</enddate><creator>YOU, Hsin-Chiang</creator><creator>HSU, Tze-Hsiang</creator><creator>KO, Fu-Hsiang</creator><creator>HUANG, Jiang-Wen</creator><creator>LEI, Tan-Fu</creator><general>IEEE</general><general>Institute of Electrical and Electronics Engineers</general><general>The Institute of Electrical and Electronics Engineers, Inc. (IEEE)</general><scope>97E</scope><scope>RIA</scope><scope>RIE</scope><scope>IQODW</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>20060801</creationdate><title>Hafnium silicate nanocrystal memory using sol-gel-spin-coating method</title><author>YOU, Hsin-Chiang ; HSU, Tze-Hsiang ; KO, Fu-Hsiang ; HUANG, Jiang-Wen ; LEI, Tan-Fu</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c490t-42abd92b33e9ad07c2ab5904a15cd23521a39d63816df50a33b31da9870d41343</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2006</creationdate><topic>Applied sciences</topic><topic>Charge</topic><topic>Charge (electric)</topic><topic>Charge retention</topic><topic>Chemical vapor deposition</topic><topic>Coatings</topic><topic>Design. Technologies. Operation analysis. Testing</topic><topic>Devices</topic><topic>Durability</topic><topic>Electric charge</topic><topic>Electron traps</topic><topic>Electronics</topic><topic>Endurance</topic><topic>Exact sciences and technology</topic><topic>Hafnium</topic><topic>hafnium silicate</topic><topic>Integrated circuits</topic><topic>Integrated circuits by function (including memories and processors)</topic><topic>Molecular electronics, nanoelectronics</topic><topic>nanocrystal memory</topic><topic>Nanocrystals</topic><topic>Performance loss</topic><topic>Rapid thermal annealing</topic><topic>Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices</topic><topic>Silicates</topic><topic>Silicon</topic><topic>Sol-gel processes</topic><topic>sol-gel spin coating</topic><topic>SONOS devices</topic><topic>Tunneling</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>YOU, Hsin-Chiang</creatorcontrib><creatorcontrib>HSU, Tze-Hsiang</creatorcontrib><creatorcontrib>KO, Fu-Hsiang</creatorcontrib><creatorcontrib>HUANG, Jiang-Wen</creatorcontrib><creatorcontrib>LEI, Tan-Fu</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>Pascal-Francis</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE electron device letters</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>YOU, Hsin-Chiang</au><au>HSU, Tze-Hsiang</au><au>KO, Fu-Hsiang</au><au>HUANG, Jiang-Wen</au><au>LEI, Tan-Fu</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Hafnium silicate nanocrystal memory using sol-gel-spin-coating method</atitle><jtitle>IEEE electron device letters</jtitle><stitle>LED</stitle><date>2006-08-01</date><risdate>2006</risdate><volume>27</volume><issue>8</issue><spage>644</spage><epage>646</epage><pages>644-646</pages><issn>0741-3106</issn><eissn>1558-0563</eissn><coden>EDLEDZ</coden><abstract>The authors fabricate the hafnium silicate nanocrystal memory for the first time using a very simple sol-gel-spin-coating method and 900 degC 1-min rapid thermal annealing (RTA). From the TEM identification, the nanocrystals are formed as the charge trapping layer after 900 degC 1-min RTA and the size is about 5 nm. They demonstrate the composition of nanocrystal is hafnium silicate from the X-ray-photoelectron-spectroscopy analysis. They verify the electric properties in terms of program/erase (P/E) speed, charge retention, and endurance. The sol-gel device exhibits the long charge retention time of 10 4 s with only 6% charge loss, and good endurance performance for P/E cycles up to 10 5</abstract><cop>New York, NY</cop><pub>IEEE</pub><doi>10.1109/LED.2006.879022</doi><tpages>3</tpages><oa>free_for_read</oa></addata></record> |
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subjects | Applied sciences Charge Charge (electric) Charge retention Chemical vapor deposition Coatings Design. Technologies. Operation analysis. Testing Devices Durability Electric charge Electron traps Electronics Endurance Exact sciences and technology Hafnium hafnium silicate Integrated circuits Integrated circuits by function (including memories and processors) Molecular electronics, nanoelectronics nanocrystal memory Nanocrystals Performance loss Rapid thermal annealing Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Silicates Silicon Sol-gel processes sol-gel spin coating SONOS devices Tunneling |
title | Hafnium silicate nanocrystal memory using sol-gel-spin-coating method |
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