Verification of a Data Synchronization Circuit For All Time

Verification of a Data Synchronization Circuit For All Time

This paper presents a model and automated proof for a synchronizer circuit that is commonly used to reliably transfer data across clock domains. In contrast with previous work, this paper describes a proof that is valid for all clock rates and phases meeting modest constraints. Furthermore, the proo...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Brown, G.M.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analytical models
Bridge circuits
Circuit analysis
Clocks
Flip-flops
Metastasis
Protocols
Synchronization
Timing
Transmitters
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:This paper presents a model and automated proof for a synchronizer circuit that is commonly used to reliably transfer data across clock domains. In contrast with previous work, this paper describes a proof that is valid for all clock rates and phases meeting modest constraints. Furthermore, the proof was realized with an existing model checker - SAL
ISSN:1550-4808
2374-8567
DOI:10.1109/ACSD.2006.35