A GaAsSb/InP HBT circuit technology

A InP/GaAsSb/InP double-heterojunction bipolar transistor (DHBT) structure has been defined, realized by MBE epitaxy, and optimized, thanks to simulation based on in-depth physical characterizations. A circuit-oriented technology has been developed, which has been validated by the design and fabrica...

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Bibliographische Detailangaben
Hauptverfasser:	Godin, J., Riet, M., Konczykowska, A., Berdaguer, P., Kahn, M., Bove, P., Lahreche, H., Langer, R., Lijadi, M., Pardo, F., Bardou, N., Pelouard, J.-L., Maneux, C., Belhaj, M., Grandchamp, B., Labat, N., Touboul, A., Bru-Chevallier, C., Chouaib, H., Benyattou, T.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Circuit simulation DH-HEMTs Diffraction Epitaxial growth Fabrication Heterojunction bipolar transistors Indium phosphide Lattices Molecular beam epitaxial growth Temperature
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Beschreibung
Zusammenfassung:	A InP/GaAsSb/InP double-heterojunction bipolar transistor (DHBT) structure has been defined, realized by MBE epitaxy, and optimized, thanks to simulation based on in-depth physical characterizations. A circuit-oriented technology has been developed, which has been validated by the design and fabrication of a full-rate (40 GHz clock) 40 Gbit/s D-FF.