A 3.3-V, 1.9-GHz, high linear CMOS up-mixer with multi-tanh linearization technique

This paper presents a single side band up-mixer implemented in SMIC 0.35 mum CMOS technology. It can be used in low-IF direct conversion PCS 1900 (1850-1910MHz) transceiver systems. The mixer is based on multi-tanh linearization technique and achieves high linearity. It operates at a single power su...

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Hauptverfasser: Zhanguo Xi, Yajie Qin, Zhiliang Hong
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:This paper presents a single side band up-mixer implemented in SMIC 0.35 mum CMOS technology. It can be used in low-IF direct conversion PCS 1900 (1850-1910MHz) transceiver systems. The mixer is based on multi-tanh linearization technique and achieves high linearity. It operates at a single power supply of 3.3V and consumes only 6mA. The up-mixer with the output buffer achieves an IIP3 of 8dBm and a 1-dB compression point of 0dBm
ISSN:2162-7541
2162-755X
DOI:10.1109/ICASIC.2005.1611336