Circuit Testing Using Self-Nonself Discrimination
Built-in self-test (BIST) techniques are rapidly becoming an industry-wide standard test technique in the design of testing support hardware for VLSI circuits. In the BIST setup both test pattern generation and output response analysis are performed on-chip hardware. In this manuscript a BIST scheme...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | Built-in self-test (BIST) techniques are rapidly becoming an industry-wide standard test technique in the design of testing support hardware for VLSI circuits. In the BIST setup both test pattern generation and output response analysis are performed on-chip hardware. In this manuscript a BIST scheme based on immune system is presented. The main conceptual ingredient utilized in order to build the proposed scheme is the application of the negative-selection mechanism of the immune system, which is able to discriminate between the self (body's own cell) and any foreign cell (non-self). Experimental results concerning fault detection in some ISCAS85 benchmarks circuits are presented |
---|---|
ISSN: | 1091-5281 |
DOI: | 10.1109/IMTC.2005.1604333 |