On-chip communication hardware resources for globally asynchronous and locally synchronous systems
Globally asynchronous and locally synchronous systems have been considered as a promising solution for the SOC to solve the problems of multiple clock distribution and multiple clock skew. The problem of regulated flow of data between the processing cores could be better addressed with local and glo...
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| creator | Supradeep Narayana |
| description | Globally asynchronous and locally synchronous systems have been considered as a promising solution for the SOC to solve the problems of multiple clock distribution and multiple clock skew. The problem of regulated flow of data between the processing cores could be better addressed with local and global control mechanisms. In this paper an attempt to develop such interface architectures for point to point communication between processing cores is presented. The paper also provides a hierarchical control model for the local and global controllers. |
| doi_str_mv | 10.1109/ISPAN.2005.64 |
| format | Conference Proceeding |
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The problem of regulated flow of data between the processing cores could be better addressed with local and global control mechanisms. In this paper an attempt to develop such interface architectures for point to point communication between processing cores is presented. The paper also provides a hierarchical control model for the local and global controllers.</description><subject>buffers</subject><subject>Centralized control</subject><subject>Clocks</subject><subject>Communication system control</subject><subject>Control systems</subject><subject>Distributed control</subject><subject>Frequency</subject><subject>Globally asynchronous and locally synchronous</subject><subject>Hardware</subject><subject>island level global controllers</subject><subject>local buffer controllers</subject><subject>Signal generators</subject><subject>System-on-a-chip</subject><subject>voltage and frequency islands</subject><subject>Voltage control</subject><issn>1087-4089</issn><issn>2375-527X</issn><isbn>9780769525099</isbn><isbn>0769525091</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpNjE1LAzEURYMfYKldunKTPzD1JZM3yVuWorZQrKCCu5LJZOzIzKQkU2T-vUVdeDcX7jlcxm4EzIUAulu_PC-e5hIA54U6YxOZa8xQ6vdzNiNtQBeEEoHogk0EGJ0pMHTFZil9wikKhSCcsHLbZ27fHLgLXXfsG2eHJvR8b2P1ZaPn0adwjM4nXofIP9pQ2rYduU1j7_Yx9OGYuO0r3gb3A_7vaUyD79I1u6xtm_zsr6fs7eH-dbnKNtvH9XKxyRqhccjIW09FoZ3wFsmVoB1VBqjMayNyUzlJHguZK4UKajAg9cl17qRWWiufT9nt72_jvd8dYtPZOO4EajTS5N_CzVmz</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Supradeep Narayana</creator><general>IEEE</general><scope>6IE</scope><scope>6IL</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIL</scope></search><sort><creationdate>2005</creationdate><title>On-chip communication hardware resources for globally asynchronous and locally synchronous systems</title><author>Supradeep Narayana</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i175t-9eae9667c1ea59cb07c9d809b3f8138dc29e562344540f080277c1cc9cbd774e3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>buffers</topic><topic>Centralized control</topic><topic>Clocks</topic><topic>Communication system control</topic><topic>Control systems</topic><topic>Distributed control</topic><topic>Frequency</topic><topic>Globally asynchronous and locally synchronous</topic><topic>Hardware</topic><topic>island level global controllers</topic><topic>local buffer controllers</topic><topic>Signal generators</topic><topic>System-on-a-chip</topic><topic>voltage and frequency islands</topic><topic>Voltage control</topic><toplevel>online_resources</toplevel><creatorcontrib>Supradeep Narayana</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP All) 1998-Present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Supradeep Narayana</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>On-chip communication hardware resources for globally asynchronous and locally synchronous systems</atitle><btitle>8th International Symposium on Parallel Architectures,Algorithms and Networks (ISPAN'05)</btitle><stitle>ISPAN</stitle><date>2005</date><risdate>2005</risdate><spage>6 pp.</spage><pages>6 pp.-</pages><issn>1087-4089</issn><eissn>2375-527X</eissn><isbn>9780769525099</isbn><isbn>0769525091</isbn><abstract>Globally asynchronous and locally synchronous systems have been considered as a promising solution for the SOC to solve the problems of multiple clock distribution and multiple clock skew. The problem of regulated flow of data between the processing cores could be better addressed with local and global control mechanisms. In this paper an attempt to develop such interface architectures for point to point communication between processing cores is presented. The paper also provides a hierarchical control model for the local and global controllers.</abstract><pub>IEEE</pub><doi>10.1109/ISPAN.2005.64</doi></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISSN: 1087-4089 |
| ispartof | 8th International Symposium on Parallel Architectures,Algorithms and Networks (ISPAN'05), 2005, p.6 pp. |
| issn | 1087-4089 2375-527X |
| language | eng |
| recordid | cdi_ieee_primary_1575828 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | buffers Centralized control Clocks Communication system control Control systems Distributed control Frequency Globally asynchronous and locally synchronous Hardware island level global controllers local buffer controllers Signal generators System-on-a-chip voltage and frequency islands Voltage control |
| title | On-chip communication hardware resources for globally asynchronous and locally synchronous systems |
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