Three-dimensional impedance engineering for mixed-signal system-on-chip applications

An innovative and manufacturable technology for three-dimensional substrate impedance engineering based on p - /p + Si substrates, which meets the stringent substrate requirement for high performance system-on-chip applications, is described. Electroless plating is used to fabricate Faraday cage for...

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Hauptverfasser:	Kyuchul Chong, Xi Zhang, King-Ning Tu, Daquan Huang, Mau-Chung Frank Chang, Ya-Hong Xie
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Crosstalk Impedance Inductors Isolation technology Manufacturing Q factor Resonance Resonant frequency System-on-a-chip Systems engineering and theory
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creator	Kyuchul Chong Xi Zhang King-Ning Tu Daquan Huang Mau-Chung Frank Chang Ya-Hong Xie
description	An innovative and manufacturable technology for three-dimensional substrate impedance engineering based on p - /p + Si substrates, which meets the stringent substrate requirement for high performance system-on-chip applications, is described. Electroless plating is used to fabricate Faraday cage for crosstalk isolation and true ground contacts. A self-limiting porous Si formation process is employed from the backside of the wafer. On-chip inductors are situated above the PS allowing for greatly increased Q-factor and resonance frequency
doi_str_mv	10.1109/CICC.2005.1568757
format	Conference Proceeding
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source	IEEE Electronic Library (IEL) Conference Proceedings
subjects	Crosstalk Impedance Inductors Isolation technology Manufacturing Q factor Resonance Resonant frequency System-on-a-chip Systems engineering and theory
title	Three-dimensional impedance engineering for mixed-signal system-on-chip applications
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