Development and production integration of a submicron tungsten interconnect process

The process characterization, optimization, and production implementation of a photoresist-masked, CVD tungsten metallization scheme is described. Statistical experimental design and response surface methodology were used to improve the manufacturability of the deposition and etch process steps. Repeatable deposition and etch rates have been achieved with anisotropic sidewall profiles. Statistical process control charts illustrating critical dimension control, as well as various monitored deposition and etch parameters are shown to document the performance of the integrated process. Finally defect densities of tungsten and aluminum interconnect are compared to ascertain the relative cleanliness and manufacturability of each process.< >