DLL-based clock recovery in a PRML channel

DLL-based clock recovery in a PRML channel

A DLL-based clock recovery circuit is designed to eliminate drawbacks of the VCO while maintaining the advantages of a PLL for frequency multiplication and jitter filtering. This design demonstrates that the tracking jitter is 1/20 of that of a PLL for a 1024 times frequency multiplication. The circ...

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Bibliographische Detailangaben
Hauptverfasser: Ping Ying Wang, Hsueh-Wu Kao, Yung-Yu Lin, Meng-Ta Yang, Jin-Bin Yang, Hsiang Ji Hsieh, Yuh Cheng, Chih-Yuan Chen, Jyh-Shin Pan
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuits
Clocks
Detectors
Filtering
Frequency conversion
Jitter
Phase locked loops
Time frequency analysis
Voltage-controlled oscillators
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Beschreibung
Zusammenfassung:A DLL-based clock recovery circuit is designed to eliminate drawbacks of the VCO while maintaining the advantages of a PLL for frequency multiplication and jitter filtering. This design demonstrates that the tracking jitter is 1/20 of that of a PLL for a 1024 times frequency multiplication. The circuits are verified with PRML detectors for BD/DVD at channel bit rates of 264/478 Mb/s.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2005.1494123