A single-chip receiver for multi-user low-noise block down-converters

A 12GHz single-chip receiver for multi-user low-noise block down-converters is presented. The 3.3mm/spl times/2mm die is implemented in a 50GHz-f/sub T/ 0.8 /spl mu/m silicon bipolar technology and includes two down-converter channels and a 10.2GHz local oscillator synthesizer. The receiver features...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Copani, T., Smerzi, S.A., Girlando, G., Ferla, G., Palmisano, G.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A 12GHz single-chip receiver for multi-user low-noise block down-converters is presented. The 3.3mm/spl times/2mm die is implemented in a 50GHz-f/sub T/ 0.8 /spl mu/m silicon bipolar technology and includes two down-converter channels and a 10.2GHz local oscillator synthesizer. The receiver features a 7.8dB SSB NF, an output P/sub 1dB/ of 5dBm with 32dB conversion gain and phase noise of -96dBc/Hz at 100kHz offset from the 10.2GHz carrier.
ISSN:0193-6530
2376-8606
DOI:10.1109/ISSCC.2005.1494057