A 0.12 /spl mu/m CMOS DVB-T tuner
A DVB-T tuner is integrated in 0.12 /spl mu/m CMOS. The 16mm/sup 2/ chip integrates a double conversion chain including PLL, VCO, voltage regulators, and ADC. The receiver exhibits a 6.5dB NF, a VCO phase noise of -140dBc/Hz at 1MHz offset at 1.21GHz, and a 14b ADC. It is compatible for integration...
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creator | Saias, D. Montaudon, F. Andre, E. Bailleul, F. Bely, M. Busson, P. Dedieu, S. Dezzani, A. Moutard, A. Provins, G. Rouat, E. Roux, J. Wagner, G. Paillardet, F. |
description | A DVB-T tuner is integrated in 0.12 /spl mu/m CMOS. The 16mm/sup 2/ chip integrates a double conversion chain including PLL, VCO, voltage regulators, and ADC. The receiver exhibits a 6.5dB NF, a VCO phase noise of -140dBc/Hz at 1MHz offset at 1.21GHz, and a 14b ADC. It is compatible for integration with a digital demodulator IP. |
doi_str_mv | 10.1109/ISSCC.2005.1494053 |
format | Conference Proceeding |
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It is compatible for integration with a digital demodulator IP.</description><subject>CMOS process</subject><subject>Digital video broadcasting</subject><subject>Filters</subject><subject>Gain measurement</subject><subject>Impedance matching</subject><subject>Linearity</subject><subject>Noise measurement</subject><subject>Phase noise</subject><subject>Tuners</subject><subject>Voltage-controlled oscillators</subject><issn>0193-6530</issn><issn>2376-8606</issn><isbn>0780389042</isbn><isbn>9780780389045</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2005</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNpjYJAyNNAzNDSw1PcMDnZ21jMyMDDVMzSxNDEwNWZi4DQyNjfTtTAzMGNm4DIwtzAwtrA0MDFiYeA0MLQ01jUzNTbgYOAtLs4yAAILI3MLYwNOBkVHBaCRRgr6xQU5Crml-rkKzr7-wQouYU66IQolpXmpRTwMrGmJOcWpvFCam0HazTXE2UM3MzU1Nb6gKDM3sagyHuoKY_yyAG9nLhY</recordid><startdate>2005</startdate><enddate>2005</enddate><creator>Saias, D.</creator><creator>Montaudon, F.</creator><creator>Andre, E.</creator><creator>Bailleul, F.</creator><creator>Bely, M.</creator><creator>Busson, P.</creator><creator>Dedieu, S.</creator><creator>Dezzani, A.</creator><creator>Moutard, A.</creator><creator>Provins, G.</creator><creator>Rouat, E.</creator><creator>Roux, J.</creator><creator>Wagner, G.</creator><creator>Paillardet, F.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2005</creationdate><title>A 0.12 /spl mu/m CMOS DVB-T tuner</title><author>Saias, D. ; Montaudon, F. ; Andre, E. ; Bailleul, F. ; Bely, M. ; Busson, P. ; Dedieu, S. ; Dezzani, A. ; Moutard, A. ; Provins, G. ; Rouat, E. ; Roux, J. ; Wagner, G. ; Paillardet, F.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-ieee_primary_14940533</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2005</creationdate><topic>CMOS process</topic><topic>Digital video broadcasting</topic><topic>Filters</topic><topic>Gain measurement</topic><topic>Impedance matching</topic><topic>Linearity</topic><topic>Noise measurement</topic><topic>Phase noise</topic><topic>Tuners</topic><topic>Voltage-controlled oscillators</topic><toplevel>online_resources</toplevel><creatorcontrib>Saias, D.</creatorcontrib><creatorcontrib>Montaudon, F.</creatorcontrib><creatorcontrib>Andre, E.</creatorcontrib><creatorcontrib>Bailleul, F.</creatorcontrib><creatorcontrib>Bely, M.</creatorcontrib><creatorcontrib>Busson, P.</creatorcontrib><creatorcontrib>Dedieu, S.</creatorcontrib><creatorcontrib>Dezzani, A.</creatorcontrib><creatorcontrib>Moutard, A.</creatorcontrib><creatorcontrib>Provins, G.</creatorcontrib><creatorcontrib>Rouat, E.</creatorcontrib><creatorcontrib>Roux, J.</creatorcontrib><creatorcontrib>Wagner, G.</creatorcontrib><creatorcontrib>Paillardet, F.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Saias, D.</au><au>Montaudon, F.</au><au>Andre, E.</au><au>Bailleul, F.</au><au>Bely, M.</au><au>Busson, P.</au><au>Dedieu, S.</au><au>Dezzani, A.</au><au>Moutard, A.</au><au>Provins, G.</au><au>Rouat, E.</au><au>Roux, J.</au><au>Wagner, G.</au><au>Paillardet, F.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>A 0.12 /spl mu/m CMOS DVB-T tuner</atitle><btitle>ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005</btitle><stitle>ISSCC</stitle><date>2005</date><risdate>2005</risdate><spage>430</spage><epage>431 Vol. 1</epage><pages>430-431 Vol. 1</pages><issn>0193-6530</issn><eissn>2376-8606</eissn><isbn>0780389042</isbn><isbn>9780780389045</isbn><abstract>A DVB-T tuner is integrated in 0.12 /spl mu/m CMOS. The 16mm/sup 2/ chip integrates a double conversion chain including PLL, VCO, voltage regulators, and ADC. The receiver exhibits a 6.5dB NF, a VCO phase noise of -140dBc/Hz at 1MHz offset at 1.21GHz, and a 14b ADC. It is compatible for integration with a digital demodulator IP.</abstract><pub>IEEE</pub><doi>10.1109/ISSCC.2005.1494053</doi></addata></record> |
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identifier | ISSN: 0193-6530 |
ispartof | ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005, 2005, p.430-431 Vol. 1 |
issn | 0193-6530 2376-8606 |
language | eng |
recordid | cdi_ieee_primary_1494053 |
source | IEEE Electronic Library (IEL) Conference Proceedings |
subjects | CMOS process Digital video broadcasting Filters Gain measurement Impedance matching Linearity Noise measurement Phase noise Tuners Voltage-controlled oscillators |
title | A 0.12 /spl mu/m CMOS DVB-T tuner |
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