Method for endurance optimization of the HIMOS/spl trade/ flash memory cell

Method for endurance optimization of the HIMOS/spl trade/ flash memory cell

A negative oxide charge located at the split-point is the main cause of threshold voltage window closure in source side injection flash EEPROM cells under 10/sup 5/ write/erase cycles. We show a slow trapping rate and a temperature dependence of the detrapping rate below 100/spl deg/C. The detrappin...

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Hauptverfasser: Yao, T., Lowe, A., Vermeulen, T., Bellafiore, N., Van Houdt, J., Wellekens, D.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Acceleration
Charge measurement
Current measurement
Flash memory cells
Interleaved codes
Optimization methods
Temperature
Testing
Threshold voltage
Voltage measurement
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creator Yao, T.
Lowe, A.
Vermeulen, T.
Bellafiore, N.
Van Houdt, J.
Wellekens, D.
description A negative oxide charge located at the split-point is the main cause of threshold voltage window closure in source side injection flash EEPROM cells under 10/sup 5/ write/erase cycles. We show a slow trapping rate and a temperature dependence of the detrapping rate below 100/spl deg/C. The detrapping rate is not temperature dependent between 100/spl deg/C and 250/spl deg/C. Finally, the split-point charge formation can be significantly reduced by using of a ramped write pulse.
doi_str_mv 10.1109/RELPHY.2005.1493193
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source IEEE Electronic Library (IEL) Conference Proceedings
subjects Acceleration
Charge measurement
Current measurement
Flash memory cells
Interleaved codes
Optimization methods
Temperature
Testing
Threshold voltage
Voltage measurement
title Method for endurance optimization of the HIMOS/spl trade/ flash memory cell
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