Front-end ASIC for co-planar grid sensors

An application specific integrated circuit (ASIC) for co-planar grid (CPG) sensors is presented. The ASIC provides low-noise amplification of grids and cathode signals, difference between grid signals with adjustable relative gain, shaped signals with baseline stabilization, and timing signals. In the current version the peaking time of the shaped pulses is 5mus and the gain can be switched between 36mV/fC and 18mV/fC covering an energy range up to 3MeV. Designed in CMOS 0.25mum technology it dissipates 25mW from a single +2.5V supply. A description of the ASIC and the results of its characterization with CdZnTe CPG sensors are presented. The system is analyzed in terms of resolution, and the impact of the noise correlation due to the inter-grid capacitance is discussed