A delay line based CMOS time digitizer IC with 13 ps single-shot precision
This paper introduces an integrated digital CMOS time-to-digital converter which measures time periods with picosecond-level resolution. The circuit was fabricated in a 0.35 /spl mu/m standard digital CMOS process. 13 ps rms single-shot precision was achieved by using a counter and a two-level neste...
Gespeichert in:
Hauptverfasser: | , , |
---|---|
Format: | Tagungsbericht |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | This paper introduces an integrated digital CMOS time-to-digital converter which measures time periods with picosecond-level resolution. The circuit was fabricated in a 0.35 /spl mu/m standard digital CMOS process. 13 ps rms single-shot precision was achieved by using a counter and a two-level nested DLL interpolation. Interpolators, which divide the cycle time of the 145 MHz reference clock to 512 pieces, provided 13.5 ps LSB width. The temperature drift was below 0.05 ps//spl deg/C. The power consumption with a 3.3 V operating voltage was 55 mW. |
---|---|
ISSN: | 0271-4302 2158-1525 |
DOI: | 10.1109/ISCAS.2005.1465574 |